The AT17LV series FPGA Configuration EEPROMs (Configurators) provide an easy-to-use, cost-effective configuration memory for Field Programmable Gate Arrays. The AT17LV series device is packaged in the 8-lead LAP, 8-lead PDIP, 8-lead SOIC, 20-lead PLCC, 20-lead SOIC, 44-lead PLCC and 44-lead TQFP, see Table 1. The AT17LV series Configurators uses a simple serial-access procedure to configure one or more FPGA devices. The user can select the polarity of the reset function by pro-gramming four EEPROM bytes. These devices also support a write-protectionmechanism within its programming mode.
The AT17LV series configurators can be programmed with industry-standard program-mers, Atmel's ATDH2200E Programming Kit or Atmel's ATDH2225 ISP Cable.
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• E2 Programmable 524,288 x 1 and 1,048,576 x 1 bit Serial Memories Designed To Store Configuration Programs For Field Programmable Gate Arrays (FPGA)• Simple Interface to SRAM FPGAs• Compatible With Atmel AT6000, AT40K FPGAs, Altera EPF8K, EPF10K, EPF6K FPGAs, ORCA FPGAs, Xilinx XC3000, XC4000, XC5200 FPGAs, Motorola MPA1000 FPGAs• Cascadable To Support Additional Configurations or Future Higher-density Arrays• Low-power CMOS EEPROM Process• Programmable Reset Polarity• Available In PLCC Package (Pin Compatable across Product Family)• In-System Programmable Via 2-Wire Bus• Emulation of 24CXX Serial EPROMs• Available in 3.3V ± 10% LV and 5V Versions• System Friendly READY Pin
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Operating Temperature.................................... -40°C to +85°C
Storage Temperature..................................... -65°C to +150°C
Voltage on Any Pin
with Respect to Ground................ .................-0.1V to VCC +0.5V
Supply Voltage (VCC)............................................-0.5V to +7.0V
Maximum Soldering Temp. (10 sec. @ 1/16 in.)................260°C
ESD (RZAP= 1.5K, CZAP= 100 pF).........................................2000V
Post a Buying Lead
Required Field 
